ARM - Assembly language

ARM, aka Acorn RISC Machine, is an assembly language created in 1985 by Sophie Wilson and Steve Furber.

#93on PLDB

39Years Old

REPL · Download · Wikipedia · FAQ · Docs

ARM, originally Acorn RISC Machine, later Advanced RISC Machine, is a family of reduced instruction set computing (RISC) architectures for computer processors, configured for various environments. British company ARM Holdings develops the architecture and licenses it to other companies, who design their own products that implement one of those architectures‍—‌including systems-on-chips (SoC) and systems-on-modules (SoM) that incorporate memory, interfaces, radios, etc. It also designs cores that implement this instruction set and licenses these designs to a number of companies that incorporate those core designs into their own products. Read more on Wikipedia...

Tags: assembly language
Early development of ARM happened in Acorn Computers
There is 1 Jupyter Kernel for ARM
Indeed.com has 6,588 matches for "arm architecture developer".
See also: (17 related languages) X86, Java Bytecode, BBC BASIC, Verilog, C, Assembly language, Java, C#, Perl, Python, MMX instruction set, JavaScript, Android, Unix, iOS, FreeBSD, Linux
1 PLDB concepts link to ARM: B3 IR

Example from Riju:

	.text
	.globl main
main:
	mov r7, #4
	mov r0, #1
	ldr r1, =message
	mov r2, #14
	swi 0
	mov r7, #1
	mov r0, #0
	swi 0
	.data
message:
	.string "Hello, world!\n"

Example from Wikipedia:

; if (r0 == r1)
CMP r0, r1
ITE EQ        ; ARM: no code ... Thumb: IT instruction
; then r0 = r2;
MOVEQ r0, r2  ; ARM: conditional; Thumb: condition via ITE 'T' (then)
; else r0 = r3;
MOVNE r0, r3  ; ARM: conditional; Thumb: condition via ITE 'E' (else)
; recall that the Thumb MOV instruction has no bits to encode "EQ" or "NE"

Language features

Feature	Supported	Example	Token
Comments	✓	; A comment
Line Comments	✓	; A comment	;
Semantic Indentation	X