KiCad Legacy Layout - Application

KiCad Legacy Layout is an open source application created in 1992.

#692on PLDB

32Years Old

KiCad (pronounced "Key-CAD") is a free software suite for electronic design automation (EDA). It facilitates the design of schematics for electronic circuits and their conversion to PCB designs. KiCad was originally developed by Jean-Pierre Charras. Read more on Wikipedia...

Tags: application, cad
Early development of KiCad Legacy Layout happened in Instituts Universitaires de Technologie de Grenoble
The Google BigQuery Public Dataset GitHub snapshot shows 914 users using KiCad Legacy Layout in 1k repos on GitHub
GitHub supports syntax highlighting for KiCad Legacy Layout
See also: (7 related languages) Linux, FreeBSD, Gerber Image, Eagle, OpenGL, Java, VRML
Read more about KiCad Legacy Layout on the web: 1.

Example from the web:

(kicad_pcb (version 3)
 (host pcbnew "(2013-02-20 BZR 3963)-testing")
  (general
  (links 2)
  (no_connects 0)
  (area 57.924999 28.924999 74.075001 42.075001)
  (thickness 1.6)
  (drawings 5)
  (tracks 5)
  (zones 0)
  (modules 2)
  (nets 3)
))

Example from Linguist:

PCBNEW-BOARD Version 1 date Fri Oct 19 11:53:05 2012

# Created by Pcbnew(2012-05-21 BZR 3261)-stable

$GENERAL
encoding utf-8
LayerCount 2
Ly 1FFF8001
EnabledLayers 1FFF8001
Links 135
NoConn 11
Di 41844 16849 73060 58324
Ndraw 54
Ntrack 512
Nzone 0
BoardThickness 630
Nmodule 51
Nnets 44
$EndGENERAL

$SHEETDESCR
Sheet A4 11700 8267
Title ""
Date "19 oct 2012"
Rev ""
Comp ""
Comment1 ""
Comment2 ""
Comment3 ""
Comment4 ""
$EndSHEETDESCR

$SETUP
InternalUnit 0.000100 INCH
Layers 2
Layer[0] Back signal
Layer[15] Front signal
TrackWidth 80
TrackWidthList 200
TrackWidthList 500
TrackWidthList 1000
TrackClearence 80
ZoneClearence 200
TrackMinWidth 80
DrawSegmWidth 80
EdgeSegmWidth 150
ViaSize 270
ViaDrill 130
ViaMinSize 270
ViaMinDrill 130
ViaSizeList 310 160
ViaSizeList 370 200
ViaSizeList 420 250
MicroViaSize 200
MicroViaDrill 50
MicroViasAllowed 0
MicroViaMinSize 200
MicroViaMinDrill 50
TextPcbWidth 75
TextPcbSize 300 400
EdgeModWidth 80
TextModSize 600 600
TextModWidth 120
PadSize 551 551
PadDrill 150
Pad2MaskClearance 80
Pad2PasteClearanceRatio -0.12
AuxiliaryAxisOrg 0 0
PcbPlotParams (pcbplotparams (layerselection 284721153) (usegerberextensions true) (excludeedgelayer false) (linewidth 60) (plotframeref false) (viasonmask false) (mode 1) (useauxorigin false) (hpglpennumber 1) (hpglpenspeed 20) (hpglpendiameter 15) (hpglpenoverlay 0) (pscolor true) (psnegative false) (psa4output false) (plotreference false) (plotvalue false) (plotothertext true) (plotinvisibletext false) (padsonsilk false) (subtractmaskfromsilk false) (outputformat 1) (mirror false) (drillshape 1) (scaleselection 1) (outputdirectory ""))
$EndSETUP

$EQUIPOT
Na 0 ""
St ~
$EndEQUIPOT
$EQUIPOT
Na 1 "/DC"
St ~
$EndEQUIPOT
$EQUIPOT
Na 2 "/DD"
St ~
$EndEQUIPOT
$EQUIPOT
Na 3 "/P0_0"
St ~
$EndEQUIPOT
$EQUIPOT
Na 4 "/P0_1"
St ~
$EndEQUIPOT
$EQUIPOT
Na 5 "/P0_2"
St ~
$EndEQUIPOT
$EQUIPOT
Na 6 "/P0_3"
St ~
$EndEQUIPOT
$EQUIPOT
Na 7 "/P0_4"
St ~
$EndEQUIPOT
$EQUIPOT
Na 8 "/P0_5"
St ~
$EndEQUIPOT
$EQUIPOT
Na 9 "